1. Field of the Invention
The invention relates generally to flash based devices and more particularly to reference circuits and methods for programming reference circuits in dual bit flash memory devices.
2. Background of the Invention
In dual bit flash memory cells, a single cell holds two bits of information. One of the two bits is often referred to as the Normal Bit (NB), while the other is often referred to as the Complimentary Bit (CB). Dual bit flash memory cells use what is known as virtual ground architectures in which the source for one of the two bits serves as the drain for the other. In other words, the cell essentially comprises a gate and two terminals. For one of the two bits, one of the two terminals is the source and the other is the drain. But for the other bit, the function of the two terminals is alternated, such that the terminal that was the source for the first bit is now the drain for the second bit, and vise versa.
In a conventional dual bit flash device, a reference cell is set at a predetermined threshold voltage (Vt). Upon reading data from a core cell, the drain current for the core cell is compared with the drain current for the reference cell. If the read current for the core cell is greater than the reference current for the reference cell, then it is determined that the core cell contains a “1”. If, on the other hand, the read current for the core cell is less than the reference current for the reference cell, then it can be determined that the core cell contains a “0”.
This approach to reading a core cell has its own problem near the “end of life” for the cell. As the flash device is used over time, the core cells can be subject to as many as 100,000 program/erase cycles. As a core cell is subject to an increasing number of cycles, the Vt for the core cell changes due to various inherent properties associated with the cell that effect reliability over time and as the cell is erased and programmed repeatedly. Reference cells were conventionally programmed only once to the predetermined Vt. As a result, the reference cells do not experience the same or similar change in cell Vt and the Vt of the reference cells do not track the changes in core cell Vt that result from the various reliability effects occurring within the core cells. The diverging Vt levels between the core cells and the reference cells in conventional dual bit flash memory devices can result in read errors, or what is often referred to as a reduced read margin.
In order to preserve the read margin, some conventional devices implemented two reference cells. The two reference cells are programmed to a “0”. The average current of the two reference cells is then used as the reference current. Further, the cells are programmed and erased along with the core cells so that they undergo the same, or similar charge loss as the core cells. A problem with this approach is that each cell's threshold voltage Vt can vary due to processing differences and differing effects for operations such as erase, program, read, etc. These differences can greatly effect the average Vt for the two cells. Since the average Vt is used for comparison with the core cell, even small variations in the average Vt can have a significant effect on the read margin. For example, if the average Vt shifts too high, then the difference from the threshold value for a data “0’ becomes small reducing the read margin for a data “0”. Similarly, if the average Vt shifts too far down, then the read margin for a data “1” becomes small.
Another approach sometimes used in conventional devices is to use two reference cells where the second reference cell is programmed to a threshold voltage based on a threshold voltage of the first reference cell. In this manner, if the first reference cell has a lower threshold voltage Vt, then the second cell can be programmed with a higher Vt, and vise versa, in order to maintain a more constant average Vt. Further, the reference cells can be cycled with the core cells so that they experience the same aging as the core cells. A draw back to this approach is that it takes a lot of time and that the average Vt is still hard to controlled.